Designing the AI chip era

At Siemens Realize LIVE in Bengaluru, India, International Metalworking News for Asia (IMNA) spoke with Ankur Gupta, | Executive Vice President, EDA IC Software, Siemens Digital Industries Software, about how the semiconductor industry is responding to the rapid growth of artificial intelligence. In this Q&A, he explains why connected EDA workflows, agentic AI, advanced packaging and system-level verification will become increasingly important as chips grow larger and more complex.

IMNA: AI is driving demand for more powerful and complex chips. How has this changed the way semiconductor companies approach chip design?

Ankur Gupta: The growth is tremendous. Training AI models requires large accelerators, while inference can often run on smaller, more specialised devices. Market forecasts vary, but most analysts agree that AI-related silicon will represent a much larger share of semiconductor demand by 2030.

The challenge is no longer simply generating demand. It is whether the industry can supply what the market needs. How quickly can companies design and verify these chips? Is there enough manufacturing capacity? Do they have enough engineers to complete the programmes?

AI chips are extremely complex, and the industry must deliver them faster than before. That makes productivity across the entire semiconductor workflow more important than ever.

IMNA: What are the biggest challenges facing chip engineers, and how is Siemens helping them?

Ankur Gupta: We describe our approach through three ideas: faster engines, smarter execution and trusted outcomes.

Engineering capacity is one of the biggest challenges. If the same team can complete two chip programmes instead of one—or finish a programme in half the time—the market will absorb that additional output.

Part of the answer is making EDA tools faster. We are using GPU acceleration and different combinations of CPUs, GPUs and Arm-based computing to speed up algorithms that have traditionally required enormous computing power.

Another challenge is the growing connection between chips and the systems around them. Previously, a system designer might treat the chip as a black box, add safety margins for power or performance and continue designing. That approach is no longer enough.

Information now needs to move between the chip, advanced package, printed circuit board and enclosure. With chiplets and 3D ICs, decisions made in one area directly affect the others.

Connecting all these domains manually would require specialists to rebuild each company’s workflow. Agentic AI offers a more practical path. AI agents can coordinate tools and run hundreds of experiments overnight, allowing engineers to review the findings the next morning.

Siemens is opening APIs and developing Model Context Protocol servers so agentic frameworks can work across these domains. The goal is not uncontrolled automation. It is to help engineers work faster while relying on trusted tools and verified results.

IMNA: With the industry facing an engineering shortage, do chip designers need new AI skills?

Ankur Gupta: The shortage is real. Estimates suggest the United States alone could be short of tens of thousands of semiconductor workers by 2030. These figures continue to change as demand rises.

Better tools can help the existing workforce manage more programmes. However, chip designers do not need to become machine-learning engineers or learn how to build foundation models.

They need to understand how an AI model, an EDA tool, proprietary company data and an agentic framework work together. They should know how to communicate effectively with AI and, more importantly, how to judge whether its output makes engineering sense.

We are seeing senior engineers adopt agentic AI very quickly. They understand chip architecture, have worked on many designs and know which questions to ask. In some cases, they are achieving productivity gains of three or four times.

Junior engineers can also become more efficient, but they may not yet have the experience needed to obtain the same results. AI strengthens expertise; it does not replace it.

IMNA: Asia Pacific remains at the centre of semiconductor manufacturing. Where are the region’s biggest opportunities?

Ankur Gupta: Manufacturing is the largest opportunity. Taiwan and South Korea have the world’s leading foundries, China produces chips across several process nodes, and Japan is investing in new capacity.

Demand for GPUs and memory remains strong, but supply cannot expand overnight. Building an advanced foundry requires enormous capital, trained workers and highly specialised engineers.

Governments and industry leaders understand this. Japan’s support for Rapidus is one example, while other Asian countries are also investing in their semiconductor ecosystems.

Chip design expertise is spread around the world, but Asia Pacific already has a strong record in manufacturing at scale. Its opportunity is to expand that capacity while building the workforce needed to operate more advanced facilities.

If the region can combine its manufacturing strength with advanced packaging, 3D IC capabilities and stronger design ecosystems, it will remain at the heart of global semiconductor growth.

IMNA: What changes do you expect to see in the semiconductor industry over the next five years?

Ankur Gupta: Looking back helps put the future into perspective. In 2021, the industry was focused on supply-chain resilience following the pandemic. Since then, governments have invested heavily in geographically diverse supply chains through programmes in the United States, Europe, India and other markets.

Five years from now, I hope current supply constraints will have eased and access to memory, GPUs, CPUs and other AI components will have normalised. We may also see more competitors and more efficient AI models that require less computing power.

From a technology perspective, 3D ICs and chiplets should become mainstream. There are physical limits to how much can fit on a single die, so the industry must build upwards—what I call “silicon skyscrapers.”

Photonics is also likely to become more widely used, with light replacing copper to move data in high-bandwidth systems.

Quantum computing may begin moving beyond research, initially through a small number of providers and specialised applications. Security could be among its first important uses because of the implications quantum computing has for existing encryption.

Whatever happens, EDA will need to manage complexity across the entire system, not just within an individual chip.

IMNA: Where is Siemens EDA investing today?

Ankur Gupta: Siemens EDA is already a leader in several areas. Tessent supports design-for-test and silicon lifecycle management, while Calibre is widely used for physical verification and design-for-manufacturing. Xpedition serves board-level design, and Solido supports analog and mixed-signal verification.

We are now investing in broader, more connected workflows. We are open by design because customers will continue using tools from different vendors. Our solutions must work effectively within those existing environments.

We are also expanding analog, mixed-signal and digital design and verification. This includes AI-assisted layout tasks, Aprisa, Questa and the Questa One platform, which brings several verification engines together. Its agentic toolkit allows customers to build solutions around their own challenges instead of following a fixed workflow.

Software-defined silicon is another major focus. Our Veloce portfolio covers virtual platforms, emulation and FPGA prototyping, enabling teams to begin software and firmware testing before the physical chip returns from the foundry.

If we can reduce an 18-month development cycle to nine months while improving verification and lowering the risk of failure when the first silicon arrives, that creates enormous value. This is where Siemens is investing: open, connected and increasingly intelligent workflows spanning chip design through full-system verification.